The invention relates to an emulation device for emulating a non-special-custom version of a microcontroller that has a standard port. The device includes an in-microcontroller multiplexing device for multiplexing the port among user data and program store addresses and externally to the microcontroller, and a register connected to the port for latching the program store addresses. The microcontroller has a machine cycle that includes a plurality of states which each comprise at least two clock pulses.
The transferring in multiplex version, of both program store addresses and user data, along a single port diminishes the requirement for having many ports. U.S. Pat. No. 4,809,167 to Metalink Corporation discloses an extension of the general principle, in that a particular 8-bit wide port transfers successively an opcode, a program counter byte, and a user data item. Such an emulation device has been described in the reference with respect to an Intel 8051 single chip microcomputer or microcontroller. The use of a non-special-custom emulating microcontroller naturally obviates the need for developing a special-custom version for emulation and test use only. In earlier standard organization, the 8051 shares port P.O slashed. among program opcode and program counter low byte address, whereas port P2 outputs program counter high byte address. The recurrency of outputting a program address is twice per machine cycle. The referenced Metalink "hooks" improvement provides for, within each half of the machine cycle, separate multiplexing program opcode, program counter address data, and port data, which was not possible with the original timing.
The inventors of the present invention have experienced that emulation according to the reference was insufficiently accurate and/or insufficiently reliable, in particular, because nearly all external timing was to be reconstructed externally to the microcontroller from either one of the address latch enable signal and/or program store enable signal, and in certain derivative microcontrollers that had no provision for outputting any of these enabling signals, even from the external crystal clock. Such reconstruction always suffers from non-conforming gate delays that may be subject to temperature-caused time skew and other deformity. Another cause of distress is that externally to the microcontroller, no discrimination was visible between two nonoperating modes, i.e. between idle and reset. The referenced 8051 microcontroller, in addition, has also a power down mode, in which processing capability is brought down for reasons of energy conservation.